1. Field
Embodiments of the present inventive concepts relate to a manufacturing method for a semiconductor device, and more particularly to a manufacturing method for a semiconductor device having an improved negative bias temperature instability (NBTI) lifetime characteristic.
2. Description of the Related Art
With the recent trend toward highly integrated semiconductor devices, the size of a semiconductor device is gradually scaled down, leading to an increasing demand for low-power, high-speed transistors. Low-power and high-speed operation in a transistor can be achieved using a gate insulating layer. In particular, reducing gate thickness and securing a negative bias temperature instability (NBTI) lifetime characteristic typically are quite important.
In non-memory and memory device below 60-nm scale, a silicon oxynitride layer (SiON) may be used as a gate insulating layer. In order to reduce the electric thickness of the SiON gate insulating layer and improve the NBTI lifetime, the position and concentration of nitrogen in the SiON gate insulating layer is controlled.